Beat 01
Fused, not stacked
Inspection images, metrology maps and chamber telemetry are fused into one panel model, so a Mura signature is read alongside the overlay and Vth data that explain it.
Features
Perception, control, twin, audit and yield intelligence
The capabilities behind the loop, described in the terms a process-integration engineer would use to evaluate them.
- Perception
- Closed-loop control
- Digital twin
- Audit
- Yield intelligence
Evaluated against real fab constraints
Gen-8.6 OLED fabFlexible OLED module lineAutomotive display makermicroLED pilot lineAR/VR microdisplay groupLTPS array fab
Perception
See the panel at sub-pixel resolution
Beat 02
True versus false calls
Classification is trained on your own historical dispositions, which is why suppression does not cost you real escapes.
Beat 03
Evidence attached
Every call links to the images, maps and telemetry behind it. Engineers verify in seconds rather than re-deriving the case.
Beat 04
Drift, not just defects
The perception layer reports trajectories. A signal that is still in spec but heading out of it is the most valuable thing it can tell you.
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
Control
Closed-loop control, stage by stage
Control is only as good as the verification behind it. Each stage closes on measurement.
Step 1 of 6 · predict
Predict the drift
Model the trajectory of thickness, overlay, Vth and uniformity before it leaves the window.
Step 2 of 6 · simulate
Simulate the correction
The twin evaluates the proposed recipe or transfer change against the current panel state.
Step 3 of 6 · approve
Route for approval
Advisory actions land in the review console with the evidence and the simulated outcome.
Step 4 of 6 · write
Write back safely
Idempotent, governed write-back over SECS-GEM with a fail-safe stop on the path.
Step 5 of 6 · verify
Verify with measurement
Post-action metrology and inspection confirm the correction landed.
Step 6 of 6 · learn
Learn from the delta
Prediction error and engineer overrides both become training signal.
Core capabilities
The feature set
Mura and defect classification
Large-area non-uniformity, sub-pixel opens and shorts, particles and stains, separated from nuisance.
Uniformity control
Deposition and anneal correction inside the process window.
Transfer optimisation
Placement, bonding and repair prioritisation for microLED.
Robotic handling coordination
Breakage and particle risk scoring across panel movement.
Aging, test and bin
Grade decisions weighed against demand mix and recovered value.
Ramp acceleration
Excursion root-cause ranking and reusable new-product playbooks.
Digital twin
Validate uniformity and yield before the run touches glass.
Immutable audit
Signed, reconstructable decision records.
Fleet learning
Model improvements travel; process IP does not.
Review console
Every call carries its evidence
An engineer sees what was sensed, what the models concluded, what the twin predicted, and what changing the decision would cost.
# call 4821 · gen-6 flexible OLED · cell test
class MURA · large-area · ΔL* 1.7
evidence uniformity map · overlay Δ · chamber 3 telemetry
cause deposition drift, chamber 3, 6.2h trend
twin correction −0.9 ΔL* predicted (validated)
action recipe write-back · awaiting approval
audit ✓ signed model v2.14.1
Reliability
Designed to fail safely, not to fail rarely
Fab software earns trust by how it behaves on its worst day. Emiteon assumes lost networks, weak signals and disagreeing engineers as normal operating conditions.
- Offline-capable fab edge runtime
- Idempotent, replay-safe agent steps
- Fail-safe stop on every control path
- Auto-degrade from autonomy to advisory on weak signal
# closed loop, one panel
perceive substrate → tft → emitter stack → sub-pixel
plan deposition · anneal · transfer · test/bin
act recipe write-back (SECS-GEM)
sense mura ΔL* · sub-pixel opens · particles
optimise yield · ramp · scrap
log immutable audit entry ✓ signed
retrain engineer correction → model
Signals
What the perception layer reads
Not an exhaustive list — the wedge workflow decides which signals matter first.
| Signal | Where it comes from | What it protects |
|---|---|---|
| Uniformity / Mura ΔL* | Cell test, optical uniformity | Visible quality, false-call load |
| Sub-pixel opens and shorts | Array and cell test | Repairable versus scrapped panels |
| Particles and stains | AOI, inspection | Yield and rework |
| Thickness and overlay | Metrology | Deposition and litho window |
| Vth and mobility | Array test | Backplane-driven non-uniformity |
| Transfer and bond outcome | Mass transfer, repair | microLED yield ceiling |
| Chamber telemetry | Tool historians | Drift attribution |
Interfaces
How features reach the floor
Inspection, metrology and test
Mura/AOI systemsOptical uniformityArray testCell testAging
Transfer, repair and handling
Mass-transfer headsLaser repairPanel roboticsCassette logistics
Fab systems
MESSECS-GEM / HSMSYield managementHistorian / OPC-UASSO and identity
Notification and workflow
TicketingShift handoverAlertingReporting surfaces
Voices from the line
What the fab floor tells us
“We do not lose panels because nobody is watching. We lose them because the signal that mattered was buried under a thousand nuisance calls.”
“Ramp is the whole game. If a new product takes two quarters of manual tuning, that is two quarters of margin we never get back.”
“Transfer yield is our ceiling on microLED. Every dead emitter is a repair cycle or a scrapped backplane.”
Quotes are illustrative composites drawn from discovery interviews with process-integration, yield and quality engineers. Named references are [PLACEHOLDER] pending design-partner consent.
The economics
What the loop is measured on
Emiteon is priced and evaluated on the numbers a fab already reports. These are design-partner targets for the first twelve months of deployment.
$26BDisplay-fab automation, process control, inspection, test and fab software market
~14%Annual growth in the segments Emiteon plays in
135%Net revenue retention target from land-and-expand
99.9%Uptime target for the fab edge runtime
Figures marked as targets are design-partner objectives, not audited results. Company operating status, customers and outcomes are [ASPIRATIONAL] until independently verified.
FAQ
Questions fabs ask first
Through three gates. Shadow mode observes and predicts with no write-back; advisory mode recommends recipe, transfer and binning moves that a process-integration or yield engineer approves; graduated autonomy releases low-risk deposition, anneal and transfer control once measured accuracy and twin validation clear the bar. High-impact decisions stay human-in-the-loop.
Reducing false calls is the wedge, not a side effect. The mura-and-defect agent is trained on true-versus-false-call labels from your own inspection history, so it separates genuine large-area non-uniformity, sub-pixel opens and shorts, particles and stains from nuisance signals, and every call is traceable to the evidence behind it.
Per-tenant isolation with recipes, panel designs and defect images scoped to your tenant, encryption in transit and at rest, SSO/RBAC, an immutable yield/quality-grade audit log and an on-prem or air-gapped option. Fleet learning shares model improvements, never your recipes.
Deposition, photolithography, encapsulation and anneal tools, Mura/AOI inspection and metrology, array and cell test, mass-transfer and repair stations, robotic handling and MES — vendor-neutral via SECS-GEM/HSMS where the tool supports it, with REST and OPC-UA bridges elsewhere.
Every pixel, perfectly uniform.
Evaluate the features that matter to your line
Bring your hardest workflow. We would rather be tested on it than on a demo.